TPUv4 Interconnect Cuts Cost, Power

Google employs optical interconnect when building a 4,096-node AI supercomputer featuring its TPUv4 accelerator chip. The result is much higher potential performance coupled with a sharp drop in carbon emissions.
15May

Dimensity 9200 Gets a Boost

The Dimensity 9200+ is a midlife kicker for MediaTek’s flagship smartphone processor, offering 5–10% more CPU and graphics performance than the original 9200. The company also renamed its low-end 5G products.
15May

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Order Activity Continues to Cool

Order Activity Continues to Cool Shereen Vaux Order activity for semiconductor equipment slipped a degree to a cold 41°. All segments moved lower as end demand remains weak, resulting in a slower pace of inventory digestion. In the mobile market demand trends continue to point downwards. On a
10May

Design Costs too high? What’s after Moore’s Law?

Design Costs too high? What’s after Moore’s Law? G. Dan Hutcheson The Chip Insider® Summary: Are Semiconductor Design Costs too high? Since the seventies, there have been two common themes about cost leading to the destruction of the semiconductor industry. One was the cost of a wafer fab and the
09May

Flex Logix Drops Chips, Sticks With IP

Flex Logix Drops Chips, Sticks With IP Flex Logix is changing its business model, opting to offer its InferX block as IP and ceasing chip-building operations. It’ll serve chipmakers requiring either AI inference or DSP capability. Bryon Moyer Flex Logix is changing its business model from selling AI
08May

Google Discloses TPUv4 Details

Google Discloses TPUv4 Details Google’s TPUv4 excels at AI models employing embeddings owing to its sea of SparseCores that supplement its two main cores. Targeting inference, the TPUv4i has only a single larger core to reduce power. Joseph Byrne Flowers are a sign of spring, and Google’s TPUv4
08May