SK hynix has released the world’s first 128-layer (128L) 3D NAND, which they have termed 4D NAND. This is their second NAND generation built using Periphery Under Cell (PUC) architecture; the first was their 96L NAND. In PUC architecture, peripheral circuits are stacked under the cell, resulting in

This presentation on the Atomic Layer Deposition/Atomic Layer Etching (ALD/ALE) process examines some of the different structures we have seen during the evolution of these logic technologies, in particular the latest 7 nm and 10 nm devices.

Contributed by: Arabinda Das Today the semiconductor industry is a behemoth whose annual sales revenue crosses US $400 Billion. Over its 60 years of existence, this mature industry has experimented with various models like integrated device manufacturer (IDM), fabless, and foundry concepts, each of

In this webinar, we present a comparison of 9x-layer 3D NAND devices from major manufacturers: Samsung, KIOXIA / Western Digital, Intel / Micron and SK hynix. The process sequence is discussed, with emphasis on the word line pad (WLP), also commonly known as staircase.

This webinar will be a review of the 650 V power MOSFET ecosystem and IP landscape. We will discuss the technologies in light of an early seminal GaN HEMT patent, demonstrating how reverse engineering can show innovation.