Logic Blog A Trip Down TSMC Memory Lane – Part 1 Dick James A few months ago we published a blog on MOS process history, triggered by Pat Gelsinger’s keynote at the Intel Innovation Days in November last year, and while at the start it was generic, when we got to 90 nm we became specific and showed

TechInsights experts review applications of hybrid bonding technology, and discuss what’s to come. This presentation compiles content from TechInsights’ subject matter experts in Memory, Image Sensor, and Logic, and from Engineers specializing in a variety of reverse engineering techniques.

TSMC’s enhanced 3nm process, N3E, employs fewer double-pattered EUV layers and allows more flexibility in the number of transistor fins than its predecessor, N3.

A serdes transceiver from Eliyan allows 32Gbps bidirectional chiplet signaling. It can reduce system cost in some systems by eliminating interposers or reduce power by halving speeds with no net bandwidth change.

MediaTek’s new top-of-the-line smartphone processor upgrades to the latest cores and protocols, offering ray tracing and other new capabilities for premium-phone buyers.

All currency figures stated in this report are in US Dollars unless stated otherwise.

New share buyback program announced

Semiconductor WEEK: An overview of results and conclusions from recent reports at TechInsights.

TechInsights Critical Subsystems Driving Forces Update on Platform Updates included are the following: Driving Forces Device Forecast Summary History and Forecast for Electronics Revenues (not updated this month) History and Forecast for Semiconductor Revenues Unit Shipments, and ASPs (not updated

Memory Blog YMTC’s Xtacking 3.0 – Not what TechInsights was expecting to see Contributing author: Chi Lim Tan Yangtze Memory Technology Company (YMTC) has been making headlines since it was founded in 2016. Considered China’s leading Integrated Device Manufacturer (IDM) for NAND memory, YMTC has