Andes AX65 CPU Targets Data Center

Andes is taking its RISC-V lineup to the next level with the AX60 family, which uses a quad-issue out-of-order microarchitecture to double CPU performance relative to the earlier AX40 family.

Linley Gwennap

In response to customer demands for more performance, the new Andes AX65 CPU doubles the throughput of the previous top-of-the-line model. The company is gaining a broad range of customers for its licensable RISC-V cores, with applications shifting from client and IoT devices toward data-center and network infrastructure. CTO Charlie Su announced the AX65 at this week’s Linley Processor Conference (powered by TechInsights). It’s the first member of a planned AX60-series.

The new 64-bit CPU is the company’s first to implement instruction reordering. It can sustain four instructions per cycle, twice the rate of the AX45 in-order CPU. The 12-stage pipeline allows clock speeds in excess of 2.5GHz, 25% faster than the AX45. Sophisticated branch prediction and a 128-instruction reorder window help avoid stalls. These capabilities enable integer performance similar to that of Arm’s Cortex-A72, but with less power and die area. AX65 RTL is scheduled to sample to selected customers in mid-2023, with general availability by the end of that year.

Customers such as Phison, Picocom, SK Telecom, and Stream Computing are pairing Andes A-series CPUs such as the AX25 and AX45 with smaller RISC-V CPUs. In storage appliances, networking, 5G infrastructure, and similar systems, the smaller cores handle the data plane while the A-series cores handle control and application processing. For AI inference, the smaller cores perform convolutions, leaving the application cores to handle nonconvolution layers. The new AX65 provides more headroom for these functions; alternatively, customers can control more cores using the same number of application CPUs.

Since adopting RISC-V, Andes has quickly produced a broad range of CPUs covering microcontroller, real-time, and high-performance tasks. The AX45 targets Cortex-A5x performance, while the AX65 extends to Cortex-A7x performance. The Taiwanese company is also getting traction in automotive designs and recently unveiled the industry’s first RISC-V CPU that’s fully ISO 26262 compliant.