Semidynamics Goes Four Ways

Semidynamics’ new Atrevido 423 CPU brings the company into RISC-V competition with other four-issue licensable cores. Deep customizability and the Gazzillion memory-request queue remain the primary differentiators.

Bryon Moyer

Semidynamics has doubled the width of its flagship RISC-V CPU in its new Atrevido 423 licensable core, yielding its first four-issue model. This should provide a substantial throughput increase, making the core more suitable for high-performance applications than its predecessors.

In widening the core, the number of instruction decoders jumps from two to four and the number of issue queues rises from three to four. The company altered the execution units, giving branch instructions their own unit and adding bit manipulation and crypto to the other ALUs in the base model.

Semidynamics offers deeply customizable RISC-V cores with a base model as the starting point. The company originated as a design house, putting design contracts at the heart of its DNA. Unlike other RISC-V offerings, it offers manual intervention, allowing more substantial changes than typically possible with automated customizable cores. It prefers to alter the design itself rather than allowing customers to do so themselves.

Led by CEO and founder Roger Espasa, the Spanish company recently launched its RISC-V offering with in- and out-of-order products branded Avispado and Atrevido, respectively, each being a two-issue core. A vector option is available for both. The four-issue brings the company into alignment with similar CPUs from RISC-V rivals such as Andes and SiFive.

Available for licensing and customization now, the Atrevido 423 targets higher-performance IoT, enterprise, and even possibly data-center systems where the CPU cores offered by others lack customer-specific features in their CPU options. Semidynamics offers design services for implementing those features.