Fewer Find 3nm Worth the Wait

TSMC and Samsung have suffered lengthy delays in their 3nm processes, and the gain in density and other characteristics is smaller than in previous nodes. Intel says its future nodes are on schedule.

Linley Gwennap

Pushing the Moore’s Law boulder forward keeps getting harder. TSMC tries to maintain a two-year cadence for process nodes, but its latest disclosures indicate 3nm production chips will ship in 2Q23, three years after 5nm. Samsung’s 3nm process recently slipped into 2023 as well. The Korean foundry plans to debut a new gate-all-around (GAA) transistor in its 3nm node, while TSMC will stick with FinFETs, giving Samsung a clear lead. Intel says its 4nm is on track for production shipments in 2Q23, putting it a half-node behind the leaders.

Not only is 3nm later, but it’ll be worse than expected. In updated projections, TSMC trimmed its targeted improvements in density, speed, and power by about 10%. It had previously admitted density would fall short of the usual 2x gain, but the new figure is only 1.6x. Even this improvement applies only to logic cells; memory will advance less than 1.3x. With each new node, TSMC increasingly relies on design optimizations to reduce the logic-gate size, but they don’t help SRAM cells.

Looking forward, both TSMC and Intel plan to move to GAA in their 2nm nodes. Intel asserts its 2nm will be “manufacturing ready” in 1H24, leading to production shipments later that year; TSMC plans shipments in 2025. Given the GAA transition’s complexity, both schedules could easily slip. Samsung plans to deploy 2nm in 2025; its second GAA node could adopt a more advanced transistor design.

In the meantime, all three chipmakers are investing heavily in new fabs while diversifying their geographical distribution. New government subsidies have spurred much of this expansion.