AMD’s Zen 5 Boosts Execution,
Data Bandwidth

Author: Dylan Mcgrath

 
AMD’s Zen 5 Boosts Execution, Data Bandwidth
 

AMD’s latest flagship CPU adds resources and bandwidth for processing vector instructions and promises a significant instructions-per-cycle (IPC) increase of 16% compared with its predecessor, Zen 4. Zen 5 makes its debut in AMD’s Ryzen AI 300 series processors for premium notebooks, code-named Strix Point, but will also appear in desktop and server processors. Notably, this is a change from previous generations of Zen CPUs, all of which appeared first in desktop processors.

Zen 5 expands the Zen microarchitecture with a 40% larger execution window. It doubles cache bandwidth to reduce latency and bottlenecks while increasing throughput. It improves support for advanced vector extensions (AVX) with full implementation of AVX‑512 support and a larger data path. It adds a second decode pipeline and beefs-up branch prediction with lower latency, better accuracy, and higher throughput.

Zen 5 comes to market at a time when AMD rival Intel is focusing more on energy efficiency with its latest CPUs and Lunar Lake processors for thin-and-light laptops. The unusually striking strategic divergence stems from trends that have defined the PC market in recent years—AMD has been eating into Intel’s lead in the notebook space with products that offer better performance per watt, while AMD is still pushing full speed ahead on performance to increase gains in the high-end PC and server markets. AMD’s break with tradition in debuting Zen 5 in laptops suggests that the company is putting more emphasis on the laptop market as opposed to the smaller but lucrative desktop market.

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