This report presents a Memory Floorplan Analysis of the Micron Z21C die found inside the Micron MT40A2G4SA-062E:J DDR4 SDRAM component.

This report contains the following detailed information:

• Selected teardown photographs, package photographs, package X-rays, die markings, and die photographs
• SEM cross-sectional micrographs of a bevel through the memory array showing the active, bit line (BL) and word line (WL) level plan-view features of the memory array and a cross section through the BL, showing the general structure of the DRAM cell array, dielectric materials, major features, and transistors
• Measurements of vertical and horizontal dimensions of major microstructural features
• Plan-view optical micrograph of the die delayered to the polysilicon layer
• Identification of major functional blocks on a polysilicon die photograph
• Table of functional block sizes and percentage die utilization
• High-resolution top metal and diffusion level die photographs delivered in the CircuitVision software
• Cost of die and tested packaged die, based on the manufacturing cost analysis of the observed process