ST Introduces Its First 64-Bit SoCs

With the introduction of the STM32MP2 series, STMicroelectronics joins competitors in the industrial SoC space marketing processors that can exploit modern operating systems and software optimized for 64-bit architectures. ST’s new devices integrate up to two Cortex A35 CPUs with a substantial number of I/Os for industrial applications in smart factories, healthcare, and smart buildings. Some models also include a 3D GPU and a small NPU for AI at the edge.

The A35 CPU supplants the 32-bit Cortex-M7 that was featured in ST’s first-generation STM32MP1 SoCs introduced in 2019 (MPR March 2019, “ST Debuts Its First Application SoCs”). The maximum CPU speed of the ST32MP2 devices is 1.5 GHz, 88% faster than the STM32MP1. The second generation also features a Cortex-M33 coprocessor, which outperforms the Cortex-M4F coprocessor in the first series by 20%. Higher-end ST32MP2 devices add the NPU and several I/Os compared to the first generation, including a PCIe interface and additional Gigabit Ethernet and CAN interfaces.

The A35 is also the most power-efficient Cortex-A CPU. Although ST has not provided final power estimates, it likely gives STM32MP2 an edge in energy efficiency against competing devices from NXP, Renesas, and Texas Instruments, most of which use Cortex-A53 CPUs.

Many modern operating systems and software applications are optimized for 64-bit architectures. The A35 is based on Arm’s 64-bit architecture, Aarch64, which uses 31 general purpose registers, each 64-bits wide, compared to 15 registers each 32-bits wide for the 32-bit Aarch32. The wider data paths and higher number of registers enable 64-bit processors to execute instructions faster, improving performance for complex tasks. Most STM32MP2 parts are scheduled to be in volume production by the end of June. Pricing information for the new devices has not been disclosed; pricing for the previous-generation STMP321 series devices ranges from $6.78 to $20.22.