Essentials: Silicon Photonics – the Backbone of HPC and AI

An overview of silicon photonics integration, key device structures, and technologies like co-packaged optics shaping next-gen datacenter interconnects.

Integrating photonics with silicon emerged in the 1980s to satisfy the demands of fiber networks. Revitalized interest in silicon photonics (SiPho) is driven by optical interconnects in AI datacenter applications. Though SiPho devices are compatible with CMOS processing, operational elements are very different. SiPho technology uses silicon-on-insulator (SOI) wafers which allows for features required by SiPho, including inputs and outputs along with novel passive and active features. Foundry SiPho offerings are available from companies including GlobalFoundries, Intel, and TSMC. Photonic and electronic functions are typically on separate dice. Advanced packaging techniques enable co-packaged optics (CPO) which bring the optical interconnect right to the processor. CPO enables faster and lower power datacenter optical interconnect. This Essentials report covers the building blocks of photonic integrated circuits (PICs), the structures used, and the technologies in development that will further improve SiPho devices.