KIOXIA FYU6_1T 218L 1 Tb TLC 3D NAND Floorplan Analysis
Discover key insights from this Memory Floorplan Analysis of the KIOXIA/WDC FYU6_1T die, showcasing advancements in 3D NAND technology and performance improvements. Read the full report for more details.
This report presents a Memory Floorplan Analysis of the KIOXIA/WDC FYU6_1T die found inside KIOXIA TH58LKT3Y48BA8J NAND flash package. Within the TH58LKT3Y48BA8J NAND flash package, the NAND dies are shingle-stacked in two side-by-side stacks of four and are connected to the printed wiring board (PWB) via bonding wires.
The KIOXIA/WDC FYU6_1T die comprises of 1,024 Gb 3D NAND flash memory. The 218-layer 3D NAND has an impressive interface speed of 3.6 giga-bits per second (Gbps), 20% write performance improvement, more than 10% read latency improvement, 50% higher bit density, and 30% power efficiency improvement over than previous generation of 162-layer 3D NAND. More information on NAND memory devices and trends can be found in the Memory NAND Technology Roadmap. The information contained in this report is relevant to:
- Chip Material and Capital Equipment Supplier
- Chip Fabrication
- Chip Designs
