AMD MI300 Family Adopts 3D Packaging
Author: Dick James
AMD’s Instinct MI300 data-center artificial intelligence (AI) accelerator family pushes the boundaries of packaging for a moderate-volume product. It employs AMD’s third-generation CDNA 3 architecture and combines x86, GPU, and high-bandwidth memory (HBM) die in a single package.
The company targets the AI and high-performance computing (HPC) markets with its MI series GPU products. The upcoming El Capitan supercomputer will use MI300As; installation has started at Lawrence Livermore National Laboratory. When it comes online, El Capitan is on track to deliver at least two exaflops of double-precision performance—it will be the second AMD-powered supercomputer to break the exaflop barrier after the Frontier system at Oak Ridge Labs.
The MI300 family combines GPU, CPU, HBM, and more into a 3D-stacked package. The MI300A is an accelerated processing unit (APU) with three Zen 4 CPU complex die (CCDs) and six accelerator complex die (XCDs) that form the GPU section of the APU. The MI300X is all GPU, with eight XCDs.
XCDs and CCDs are fabricated in TSMC’s N5 technology and sit on four I/O die (IODs) manufactured using TSMC’s 6 nm process. The IODs, containing cache and system infrastructure, connect to eight third-generation high-bandwidth memory (HBM3) stacks via a silicon interposer.
The AMD Infinity Fabric links save substantial system power and area by connecting XCDs, CCDs, IODs, and HBM within the package instead of outside as well as between other MI300 chips in a system. One of the fabric links on each IOD can be configured to act as a ×16 PCIe Gen 5 port for pure I/O functionality.
