Advanced Packaging Takes Center Stage at IEDM: A Focus on Multi-Chip Modules and Chiplet Technology

Advanced Packaging Takes Center Stage at IEDM: A Focus on Multi-Chip Modules and Chiplet Technology

The 70th IEEE International Electron Devices Meeting (IEDM) in San Francisco showcased the growing importance of advanced packaging, particularly multi-chip module integration and chiplet technology, in addressing the escalating demands of artificial intelligence. While the conference's overarching theme was AI, discussions frequently highlighted how advancements in semiconductor packaging are crucial for scaling compute power. TSMC emerged as a central figure, with presentations on their advanced packaging roadmap and their technology featured in talks from industry giants like NVIDIA, AMD, and Meta.

NVIDIA and AMD Showcase Advanced Packaging Innovations

NVIDIA's presentation provided insights into their Blackwell B200 GPU, revealing details about its impressive specifications and advanced packaging. The B200's design, incorporating two large GPUs and substantial HBM3E memory, relies heavily on sophisticated interconnection technologies. The use of a silicon interposer strongly suggests TSMC's CoWoS-S packaging, a testament to the effectiveness of this multi-chip module approach. This choice underscores the importance of high-bandwidth, low-latency communication between the GPU and memory in AI applications.

AMD's talk focused on their innovative approach to cache co-evolution with chiplet technology. They detailed how fan-out RDL and SoIC packaging have enabled them to expand local cache in their CPUs and GPUs. AMD's use of TSMC's SoIC technology for V-Cache in CPUs and Infinity Cache in GPUs exemplifies the power of chiplet technology to improve performance. Their transition from monolithic dies to chiplets in GPUs, facilitated by FO-RDL, demonstrates the adaptability and scalability of this approach.

TSMC's Advancements in 3D Integration

TSMC's own presentation on their next-generation SoIC platform offered a glimpse into the future of 3D integration. Their advancements in chip-to-wafer face-to-face die bonding and Cu-Cu bond pitch reduction promise significant increases in bond density. These improvements are essential for creating even more complex and interconnected multi-chip modules.

Meta's Innovative Packaging for AR Glasses

Meta's presentation on their AR glasses showcased the cutting-edge packaging technology enabling their compact and power-efficient design. The use of hybrid bonding with Cu-Cu bonds for their SoC highlights the importance of miniaturization and high-density interconnects in wearable devices. The unique die-last flip-chip bonding to a pre-formed FO-RDL suggests a potential implementation of TSMC's CoWoS-R packaging, demonstrating the versatility of this technology.

Optical Interconnects: The Future of High-Bandwidth Communication

TSMC's presentations on co-packaged optical interconnects highlighted the potential of optical communication in AI and broadband applications. The integration of photonics ICs with electronics ICs using SoIC technology, along with advancements in coupler design, paves the way for high-bandwidth, low-energy communication between multi-chip modules. While still in the research phase, optical interconnects represent a promising direction for overcoming the limitations of traditional electrical interconnects.

The Growing Importance of Advanced Packaging

The IEDM 2024 conference clearly demonstrated the increasing reliance on advanced packaging, specifically multi-chip module integration and chiplet technology, across the semiconductor industry. As AI continues to drive demand for higher compute power, these technologies are becoming essential for pushing the boundaries of performance and enabling the next generation of intelligent devices. The discussions at IEDM underscored the collaborative efforts between chip manufacturers, foundries, and system designers to innovate in this critical area.

For the full report and details on how industry leaders are leveraging chiplet technologies, read Advanced Packaging At IEDM – TSMC’s AI Integration and Optical Development Highlighted.

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